The innovation of modern automobiles begins with the utilization of electronic control units (ECUs) and sensors inside vehicles. Systems like the engine, transmission, electric power steering (EPS), brakes, and airbags are all controlled through ECUs, with semiconductor chips (SoC, MCU, ASIC, etc.) at the core of these systems. These chips not only influence the performance of vehicles but also directly affect their safety. As advanced technologies such as autonomous driving and advanced driver assistance systems (ADAS) continue to evolve, the importance of semiconductor design and functional safety is growing exponentially.
However, failures in automotive semiconductors can lead to severe safety issues and even loss of life. To mitigate these risks, functional safety standards like ISO 26262 have become indispensable guidelines. These standards provide robust processes to ensure safety from the initial stages of semiconductor design.
ISO 26262 and Semiconductor Design: Why Is It Important?
What Is ISO 26262?
ISO 26262 is an international standard that ensures the functional safety of automotive electrical and electronic (E/E) systems. It defines safety goals and requirements for systems and provides processes and methodologies to achieve them. Notably, it evaluates the safety criticality of each function by assigning an ASIL (Automotive Safety Integrity Level) rating, ranging from A to D, with D being the most stringent.
Three Elements of ASIL Evaluation:
Severity (S): The seriousness of harm caused by an incident.
Exposure (E): The likelihood of the situation occurring.
Controllability (C): The ability of the driver to control the situation.
Part 11: New Guidelines for Semiconductor Design
The 2018 edition of ISO 26262 (2nd edition) introduced Part 11, which focuses on the design and development of semiconductors. This addition acknowledges the growing complexity of automotive semiconductors and the need to ensure safety not just at the ECU (System Level) but also at the semiconductor (HW Level).
Key Points:
Analysis of random failure rates and evaluation of fault modes in semiconductor design.
Design and validation of hardware safety mechanisms such as ECC, Lockstep, and BIST.
Diagnostic coverage analysis through FMEDA (Failure Mode, Effects, and Diagnostic Analysis).
Key Considerations for Semiconductor Design
1. Safety Mechanisms
Implementing key safety mechanisms during the semiconductor design phase is crucial for ISO 26262 compliance.

ECC (Error Correction Code): Detects and corrects memory data errors to ensure data integrity. For instance, ECC applied to SRAM or DRAM can detect bit flip errors and prevent Single Point Faults.
Lockstep CPU Core: Performs the same operations on two CPU cores simultaneously and compares the results to detect errors. This technique is widely used for high safety levels like ASIL D.
BIST (Built-In Self-Test) and LBIST: Enables hardware to diagnose errors autonomously. LBIST detects real-time logic errors, which is especially vital for autonomous driving systems.
Watchdog: Monitors system malfunctions and switches to a safe mode if an anomaly is detected.
2. FMEDA (Failure Mode, Effects, and Diagnostic Analysis)
FMEDA is a process for quantifying failure modes, their effects, and diagnostic coverage (DC) for hardware components. It plays a critical role in achieving system ASIL goals.
Key Analysis Areas:
Deriving failure modes (short, open, stuck-at faults, etc.) and failure probabilities (FIT).
Analyzing diagnostic coverage rates of mechanisms like ECC and Lockstep.
Use Case: Semiconductor design teams use FMEDA results to refine failure modes and provide data to OEMs and Tier 1 suppliers, ensuring improved system safety.
3. Quality Management and Process Improvement

ISO 26262 Part 8 outlines requirements for SW/HW quality assurance, which are applied to semiconductor design in the following ways:
Configuration Management: Systematic management of design data (RTL, IP) and validation environments.
Requirement Traceability: Ensures that safety requirements are reflected accurately in design and validation stages.
Verification and Testing: Comprehensive testing from pre-silicon simulation to post-silicon and ATE (Automatic Test Equipment) stages.
Practical Applications: Safe Semiconductor Design
ASIL D SoC Design
To meet ASIL D goals, designs incorporate dual-core Lockstep, ECC memory, and BIST functionalities. These designs aim to achieve Single Point Fault Metric (SPFM) and Latent Fault Metric (LFM) rates exceeding 90-99%.
Adoption Strategies
Initial Cost Investment: Preparing for ISO 26262 certification requires substantial initial costs but leads to long-term savings in maintenance and enhanced customer trust.
Dedicated Teams: Establishing teams with functional safety experts (FuSa Managers) and validation engineers ensures systematic compliance.
Tool Qualification: Design and validation tools (EDA tools, FMEDA calculation tools) must also be certified according to ISO 26262 requirements.
Summary: The Future of Semiconductor Design
ISO 26262 is more than a certification requirement; it is a framework for enhancing the quality and reliability of automotive semiconductor designs. As autonomous driving and ADAS technologies advance, ensuring safety from the early stages of semiconductor design is essential.
Key Takeaways:
ISO 26262 Part 11 provides specific guidelines for semiconductor design.
FMEDA strengthens system safety through fault mode analysis and diagnostic coverage evaluation.
Hardware safety mechanisms such as ECC, Lockstep, and BIST must be considered early in the design phase.
Collaboration with OEMs and Tier 1 suppliers ensures safe integration of semiconductor designs into larger systems.
Compliance with ISO 26262 is a prerequisite for preparing for the era of autonomous vehicles. By achieving both safety and quality in semiconductor design, the automotive industry can build greater trust and confidence. With Hermes Solution, your company can receive expert guidance and support to successfully design semiconductors that meet ISO 26262 requirements. Together, let’s build a safer and more innovative future.